soft-core
英 [ˈsɒft kɔː(r)]
美 [ˈsɔːft kɔːr]
adj. 软性色情的; (性描写等)隐晦的，含蓄的
牛津词典
adj.
- 软性色情的；（性描写等）隐晦的，含蓄的
showing or describing sexual activity without being too detailed or shocking
柯林斯词典
- (性描写)非赤裸裸的，较隐晦的
Soft-corepornography shows or describes sex, but not very violent or unpleasant sex, or not in a very detailed way.
双语例句
- The paper introduces the structural features of the network processor Nios II and customized instructions and design methods for forwarding software of the network processor based on the Nios II soft-core processor and design methods for the DSP processor used for the processing of the video and image data.
文中介绍了网络处理器NIOSii的结构特点和自定义指令以及基于NIOSii软核处理器的网络处理器转发软件的设计方法和基于视频图像处理的DSP处理器的设计方法。 - With the establishing of verification and test platform for SDH chip, We realize the function simulation, timing simulation and performance test of the IP soft-core.
通过建立SDH芯片验证平台和SDH芯片测试平台，实现IP软核的功能仿真、时序仿真和芯片性能测试。 - First, use of the system functions on a single chip design ideas, using a high-performance soft-core processor ( Nios II CPU) and IP multiplexing and improve the whole system to further improve the speed and flexibility.
第一，运用了在单芯片上实现系统功能的设计思想，采用了高性能的软核处理器（NiosIICPU）和IP复用技术，提高了整个系统的运行速度和进一步改进的灵活性。 - This paper introduces 8B/ 10B encoding technique, and puts forward a simple and practical realization method of an 8B/ 10B encoder. Furthermore, a versatile soft-core designed with Verilog is presented.
本文介绍了8B/10B编码技术，提出了一种简单、实用的8B/10B编码器的实现方法，并且采用Verilog语言设计了一种通用的软核。 - NIOS ⅱ soft-core processor is a flexible and efficient embedded processor promoted by Altera Corporation.
NIOSⅡ软核处理器是Altera公司推出的一款灵活高效的嵌入式处理器。 - According to the structure model of data acquisition and processing system connected by Ethernet, the network interface module based on the Nios soft-core system is designed to construct the network data acquisition system.
为构建网络化的数据采集系统，根据数据采集模块与处理控制模块通过以太网相连接的结构模型，设计了基于Nios软核系统的嵌入式以太网网络接口模块。 - Designed the inter-frame decoding IP soft-core, including the motion vector generation module, prediction processing modules and interpolation modules.
详细设计了帧间解码IP软核，包括运动矢量生成模块、预测处理模块和插值模块。 - This paper proposes a new method for embedded system designing, based on FPGA and soft-core CPU.
提出了一种基于FPGA（现场可编程门阵列）和软核CPU的嵌入式系统设计的新方法。 - The Nios ⅱ soft-core processor improve the integration of the system and is helpful to the miniaturization of instrument.
NiosⅡ软核处理器提高了系统的集成度，有利于系统的小型化，降低了成本。 - To solute the problem, the idea of kernel hardware design has been put forward. System architecture is divided into soft-core and hardcore. Hardcore will manage application tasks as a coprocessor to improve the real time of system.
针对实时性问题，提出将内核硬件化设计的思想，将系统的体系结构划分为软核和硬核，硬核作为协处理器管理应用任务，提高系统的实时性，使系统的性能得到明显的提高。